Rainer Leupers
Rainer Leupers
Bookitis has not yet captured a biography for this author, but the catalog links below show the books currently associated with this profile.
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Featured books
Representative editions for works actually authored by this person.
- Image source: Open LibraryLL
Logic Locking
cover - Image source: Open LibraryHO
Handbook of Signal Processing Systems
cover - Image source: Open LibraryPE
Power Estimation on Electronic System Level using Linear Power Models
cover - Image source: Open LibraryPH
Programming Heterogeneous Mpsocs
cover - Image source: Open LibraryCC
C Compilers for ASIPs
cover - Image source: Open LibraryAA
Application Analysis Tools for ASIP Design
cover - Image source: Open LibraryMS
Multiprocessor Systems on Chip
cover - Image source: Open LibraryLE
Languagedriven Exploration And Implementation Of Partially Reconfigurable Asips
cover - Image source: Open LibraryRP
Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
cover - Image source: Open LibraryOA
Optimized ASIP synthesis from architecture description language models
cover - Image source: Open LibraryPA
Processor and System-on-Chip Simulation
cover - Image source: Open LibraryAE
Architecture exploration for embedded processors with LISA
cover - Image source: Open LibraryIS
Integrated system-level modeling of network-on-chip enabled multi-processor platforms
cover - Image source: Open LibraryCE
Customizable embedded processors
cover - Image source: Open LibraryCE
Customizable embedded processors
cover - Image source: Open LibraryRC
Retargetable Compiler Technology for Embedded Systems
cover - Image source: Open LibraryRC
Retargetable compiler technology for embedded systems
cover - Image source: Open LibraryCO
Code Optimization Techniques for Embedded Processors
cover - Image source: Open LibraryCO
Code Optimization Techniques for Embedded Processors - Methods, Algorithms, and Tools
cover - Image source: Open LibraryRC
Retargetable Code Generation for Digital Signal Processors
cover - Image source: Open LibraryRC
Retargetable code generation for digital signal processors
cover
Works in catalog
Quick navigation into the work-level grouping pages behind the featured books.
- Open Work
Logic Locking
- Open Work
Handbook of Signal Processing Systems
- Open Work
Power Estimation on Electronic System Level using Linear Power Models
- Open Work
Programming Heterogeneous Mpsocs
- Open Work
C Compilers for ASIPs
- Open Work
Application Analysis Tools for ASIP Design
- Open Work
Multiprocessor Systems on Chip
- Open Work
Languagedriven Exploration And Implementation Of Partially Reconfigurable Asips
- Open Work
Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
- Open Work
Optimized ASIP synthesis from architecture description language models
- Open Work
Processor and System-on-Chip Simulation
- Open Work
Architecture exploration for embedded processors with LISA
- Open Work
Integrated system-level modeling of network-on-chip enabled multi-processor platforms
- Open Work
Customizable embedded processors
- Open Work
Customizable embedded processors
- Open Work
Retargetable Compiler Technology for Embedded Systems
- Open Work
Retargetable compiler technology for embedded systems
- Open Work
Code Optimization Techniques for Embedded Processors
- Open Work
Code Optimization Techniques for Embedded Processors - Methods, Algorithms, and Tools
- Open Work
Retargetable Code Generation for Digital Signal Processors
- Open Work
Retargetable code generation for digital signal processors