This book was motivated by the problems being faced with shrinking IC process feature sizes. It is well known that as process feature sizes shrink, a host of electrical problems such as cross-talk, electromigration, self-heat, etc. become important. Cross-talk is one of the major problems since it results in unpredictable design behavior. In particular, it can result in significant delay variation or signal integrity problems in a wire, depending on the state of its neighboring wire. Typical approaches to tackling the cross-talk problem attempt to fix the problem once it is created. This book introduces a framework for cross-talk-free IC design. The main foundation of the book is the use of a predetermined layout pattern on the IC, which we call a `layout fabric'. The authors characterize this fabric and show how it yields cross-talk-immune designs. Two VLSI design flows are introduced which use the fabric concept. One flow is a minimally modified standard-cell based flow. The other flow uses a network of PLAs to implement the circuit. The authors also introduce `wire removal' techniques which improve circuit wire ability and thereby reduce circuit area. The new concepts presented here will be of interest to IC designers and researchers.